Stanford University Networking Seminar
This presentation discusses the concept of using PCI Express switch over Ethernet technology or Express Ether (ExpEther or EE) enabled hardware for ubiquitous computing and IoT applications. It explains various features of EE which would help, improve and sustain, data or computational intensive real-time applications for the present and future of IoT. Secondly, we propose the concepts of Broad-Scale Single Computer and evolution of current server hardware architecture. It is called Rack Scale Architecture which is recommended by IT infrastructure giants as the next step or the future of data storage and intensive computation. The Service Acceleration platform concept or IO Disaggregated systems powered by EE can allow hardware acceleration on-demand and reconfigurable hardware platforms. We introduce PCIe communication protocol over Ethernet as a backbone of the communication between various sensors (local or remote) to connect with IoT main controller. We will explain the merit features like scalability, security, sustainable or high performance and fail-over recoveries based applications which can be developed using EE enabled hardware. Using Service Acceleration platforms or IO Disaggregation powered by EE for realizing a Ubiquitous Computing or IoT solution is the main aim. We explain how using ExpEther we can share and dynamically allocate HW resource by software configuration and reduce total cost of the system. User will have sustained and secure high-performance system with re-configurability. We will explain two possible ways EE enabled hardware architectures can be used for Ubiquitous Computing or IoT solutions:
1. EE enabled hardware for all communications or to connect various IoT devices and IoT main controller.
2. EE enabled hardware or Rack-Scale Architecture approach having resource pooling and sharing for providing on-demand processing and storage for various applications in the IoT solution domain.
Deepak Pathania is a Technical Leader at NEC and is associated for almost 10 years. He has a Post-Graduation Diploma in VLSI Design from Center for Development of Advanced Computing (CDAC, India). His experience involves working with NEC Research Labs located across the globe for various concepts/ideas to hardware solutions. He has been involved in various technologies or domains like next generation computer system architectures for commercial and space technologies, image and video processing, cryptography, artificial intelligence/Machine Learning, digital communication, FPGA, ASIC and High Level Synthesis (HLS). His current work involves realizing/endorsing low-cost high-performance in computing and storage solutions using NEC's service acceleration platform. With a vision for providing low-cost/GFLOPs, IOPS or super-computing/storage power for everyone.